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added remaining LSL2 entities

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Infineon\StieberD
2024-03-25 15:12:53 -07:00
parent 15b25a611c
commit 81e4baccb1
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29
LSL2/STPROCINS/SCHEDULE_SRL_EQU.txt Normal file
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* Equates for SCHEDULE_SRL created on 04/03/96 07:41AM
equ SCHEDULE_SRL_PO$ to 1
equ SCHEDULE_SRL_ORDER_NO$ to 2
equ SCHEDULE_SRL_CUST_NO$ to 3
equ SCHEDULE_SRL_ENTRY_ID$ to 4
equ SCHEDULE_SRL_STATUS$ to 5
equ SCHEDULE_SRL_ENTRY_DATE$ to 6
equ SCHEDULE_SRL_CLOSE_DATE$ to 7
equ SCHEDULE_SRL_ORDER_LINE$ to 8
equ SCHEDULE_SRL_WO$ to 9
equ SCHEDULE_SRL_RUN_ORDER_NUM$ to 10
equ SCHEDULE_SRL_RDS_IDS$ to 11
equ SCHEDULE_SRL_WAFERS_IN$ to 12
equ SCHEDULE_SRL_QUOTE_NUM$ to 13
equ SCHEDULE_SRL_WAFER_REC_DATE$ to 14
equ SCHEDULE_SRL_SCHED_QTY$ to 15
equ SCHEDULE_SRL_SCHED_DATE$ to 16
equ SCHEDULE_SRL_SHIP_QTY$ to 17
equ SCHEDULE_SRL_SHIP_DATE$ to 18
equ SCHEDULE_SRL_NOTES$ to 19
equ SCHEDULE_SRL_INVOICE_IDS$ to 20
equ SCHEDULE_SRL_SHIP_VIA$ to 21
equ SCHEDULE_SRL_TRACKING_NO$ to 22
equ SCHEDULE_SRL_SHIP_SETUP_CHARGE$ to 23
equ SCHEDULE_SRL_SHIP_PRICE$ to 24
equ SCHEDULE_SRL_BOX_CNT$ to 25
equ SCHEDULE_SRL_REJECTS$ to 26
equ SCHEDULE_SRL_UNPROCESSED$ to 27